1. Field of the Invention
The present invention relates to an image signal input circuit including a clamp circuit for holding a sink chip voltage constant.
2. Description of the Related Art
It is necessary to hold a sink chip voltage, which is a voltage at a chip end (i.e. sink chip) of a reference synchronous signal, constant in order to detect vertical and horizontal synchronizing signals contained in an analog image signal. The conventional driver IC for image signals uses an input circuit having a clamp circuit for detecting the vertical and horizontal synchronizing signals. An input circuit of the bias type is used to process a signal which does not contain the sink chip. As described, one example of a circuit for making the sink chip voltage constant is a clamp circuit.
FIG. 9 illustrates an example of conventional clamp circuits. For example, the conventional clamp circuit 10 is built in a driver IC 20 for driving an image signal. An input terminal T of the driver IC 20 is connected to a previous stage circuit 21 such as a Digital to Analog Converter (DAC) via a capacitor C1 for removing a direct current component of a signal.
The clamp circuit 10 holds a sink chip voltage of an image signal input from the input terminal T constant, and supplies the image signal to a subsequent stage circuit 22 of the driver IC 20. The clamp circuit 10 includes a voltage source V1 and a transistor Q1. The transistor Q1 is an NPN transistor.
The collector of the transistor Q1 is connected to a power source Vcc, and the emitter of the transistor Q1 is connected to the input terminal T of the driver IC 20 and the subsequent stage circuit 22. The base of the transistor Q1 is connected to ground GND via a voltage source V1. The voltage Va of the voltage source V1 is set as an optimum operating point of the subsequent stage circuit 22. The sink chip voltage of the clamp circuit 10 is fixed at (Va-Vf1). Vf1 is a forward voltage of the transistor Q1.
When the sink chip voltage is lower than the voltage Va, the capacitor C1 receives an electric charge from the power source Vcc via the transistor Q1. Then, the sink chip voltage rises. Further, when the sink chip voltage is higher than the voltage (Va-Vf1), the voltage is kept.
Such a clamp circuit is disclosed in, for example, Patent Document 1.
The conventional clamp circuit 10 requires the capacitor C1 for holding the sink chip voltage constant. When the driver IC 20 having the built-in clamp circuit 10 is used, the capacitor C1 needs to be mounted to connect the driver IC 20 to the previous stage device 21.
In recent years, various electronic devices are being downsized. Because of the compactness of the electronic devices, circuit sizes of the electronic devices are required to be reduced. For example, it is required to solve a problem of a connection of a previous stage device with the driver IC via a capacitor. [Patent Document 1] Japanese Unexamined Patent Publication No. 11-308063